MIPS machins - limitation of 2 ^ 16 locations?

If you looked at the instruction format of the branch you would have your answer.

There is only space for 16-bits of displacement in the instruction. Since the value is in 4-byte words, you have a range of 2^17-1 to -2^17 from the current location. If you need to branch farther, you branch to a jr jump instruction, where the destination is contained in a register. For the common case, you save yourself having to load the destination into a register, which is less efficient. It's called optimizing for the common case.

Does the argument for beq is address or offset?

I think it is offset. If first arguments are true then current PC + this offset is the next instruction to be executed. If it is, the address space what you are referring is not 2^16