How do I draw a combination logic circuit to implement this Boolean expression?

Start by simplifying the expression. 

    Y = AC'F + ACF + CF'

        = AF(C + C') + CF'         Factor AF from first two terms

        = AF(1) + CF'                 Replace C+C' with 1 ("true")

    ��   = AF + CF'                     1 is an identity for "and"

That's three two-input gates plus an inverter to get F'. 

   (A and F) or (C and (not F)) -->  Y

That's pretty simple.  Was there some restriction, like only NAND gates or only 2-input gates on the original expression without simplifying?

Start with something simpler:

Draw Y= AC