how do you implement a 3 bit XOR gate, consisting of only 2 bit NAND gates?

First off we know that NAND gates can build all other gates because you can use them to build AND, OR and NOT gates. Let s just work off of that. If we allow ourselves to use those three gates (but only the 2-bit versions) then it becomes simple. Plug inputs A and B into and OR gate and then plug that result and input C into both an OR gate and a NAND gate and finally take those two outputs and plug them into an AND gate and that is the result (you can figure it out yourself by working through the logic or just writing out a truth table). We know that you can make an AND gate from NAND gates by plugging both inputs into a NAND gate and then that output into another NAND gate. We also know that you can make an OR gate from NAND gates by plugging input A into both inputs of a NAND gate and then doing the same with input B on another NAND gate and then plugging the results of both into another NAND gate. Finally just replace the above structure for an XOR gate using the AND and OR gates with their NAND equivalents.

Not that I have the answer, but you should specify which "version" or interpretation of a 3 input XOR you are trying to simulate. There are two:

1) One and only one bit is on

2) Any odd number of bits is on

https://mindhunter74.wordpress.com/2011/04/25/xor-...

Or, try this one, not sure if it is correct, but it just cascades the first two, then XORs it with a third bit with same logic:

https://www.physicsforums.com/attachments/imag0229...